1. Field of the Invention
This invention relates to a method for manufacturing a semiconductor device.
2. Description of the Related Art
In general, power semiconductor elements which are used in a power conversion device, or the like, include semiconductor elements which perform a switching operation, such as a metal oxide semiconductor field effect transistor (MOSFET) or an insulated gate bipolar transistor (IGBT), or a free wheel diode (FWD), which is used in combination with these semiconductor elements, etc.
For example, an IGBT has the high-speed switching characteristics and voltage drive characteristics of a MOSFET, and the low on-voltage characteristics of a bipolar transistor, and structures such as punch through (PT), non-punch through (NPT), and field stop (FS), etc. are commonly known. In the case of an NPT-type IGBT or an FS-type IGBT, a method of manufacture using an inexpensive semiconductor substrate (called the “FZ substrate” below) based on a floating zone (FZ) method is known.
By using an FZ substrate, it is possible to significantly reduce the product thickness (the overall thickness of the semiconductor substrate) and to increase the heat dispersion properties, compared to a case of using a semiconductor substrate in which a plurality of epitaxial layers is stacked on top of a starting substrate (called the “epitaxial substrate” below). For example, in the case of an FS-type IGBT, the overall thickness of the semiconductor substrate is approximately 50 μm to 200 μm. Each electrode in a semiconductor element (chip) of this kind is connected to a circuit pattern and/or a plate-shaped conductor (collectively called “external connection terminals” below) on an insulating substrate on which the element is mounted, and is wired to the outside.
For example, a method has been proposed in which, in a vertical-type semiconductor element having an electrode (electrode pad) on both main surfaces, mutually different external connection terminals (for example, copper foil sheets) are bonded by solder bonding to both a front surface electrode and a rear surface electrode. By solder bonding the front surface electrode and the external connection terminal, it is possible to achieve higher density mounting of module packages, improved current density, reduced wiring capacitance in order to raise the switching speed, and improved cooling efficiency of the semiconductor elements, and so on.
The front surface electrode is normally formed by using a metal having poor solder wetting properties, of which the main component is aluminum (Al), for example. Consequently, a method has been proposed in which the solder wetting properties of the surface of the front surface electrode are improved and the bonding reliability at the interface between the front surface electrode and the solder layer is improved, by forming a metal layer having good solder wetting properties (for example, a nickel (Ni) layer), on the surface of the front surface electrode (for example, see PTL 1 (paragraph 0033) indicated below). Plating methods using electroplating or electroless plating are known generally as methods for forming a metal layer having good solder wettability on the surface of the front surface electrode in this way.
Moreover, a method to carry out a plating process selectively only in a prescribed portion, in a state where a portion where a plating layer is not to be formed is covered with an insulating film and/or resin film, a resist film, a supporting substrate, and the like, or a state where a semiconductor substrate is fixed by a special jig which prevents plating liquid from flowing around into portions where the plating layer is not to be formed, is known. For example, a method has been proposed, in which a prescribed process is carried out on a surface to be processed in a state where a support plate (support substrate) has been bonded via an adhesive layer to the surface of a semiconductor substrate on the opposite side to the surface to be processed (for example, see PTL 2 indicated below).
Moreover, a further method has been proposed, in which, when forming a plating layer on only the surface of one main surface-side electrode (front surface electrode) of a semiconductor substrate, a plating process is carried out in a state where a first film has been bonded to the surface of the other main surface-side electrode (rear surface electrode), and a second film has been bonded to the outer peripheral portion of the semiconductor substrate (for example, see PTL 3 indicated below). In PTL 3, by protecting the rear surface electrode and the outer peripheral portion of the substrate with a film, it is possible to prevent abnormal precipitation of the plating layer onto the rear surface electrode and the outer peripheral portion of the substrate, as well as soiling of the plating bath and/or change over time in the composition of the plating bath due to the separation of an abnormally precipitated plating layer, and so on.